rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adp3309 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000 anycap 100 ma low dropout linear regulator functional block diagram thermal protection driver g m cc in adp3309 out r1 r2 gnd q1 err/ nc sd bandgap ref q2 features 1.2% accuracy over line and load regulations @ 25 c ultralow dropout voltage: 120 mv typical @ 100 ma requires only c o = 0.47 f for stability anycap = stable with all types of capacitors (including mlcc) current and thermal limiting low noise low shutdown current: 1 a 2.8 v to 12 v supply range C20 c to +85 c ambient temperature range several fixed voltage options ultrasmall sot-23-5 package excellent line and load regulations applications cellular telephones notebook, palmtop computers battery powered systems pcmcia regulator bar code scanners camcorders, cameras general description the adp3309 is a member of the adp330x family of precision low dropout anycap voltage regulators. it is pin-for-pin and functionally compatible with nationals lp2981, but offers performance advantages. the adp3309 stands out from con- ventional ldos with a novel architecture and an enhanced process. its patented design requires only a 0.47 f output capacitor for stability. this device is stable with any type of capacitor regardless of its esr (equivalent series resistance) value, including ceramic types for space restricted applications. the adp3309 achieves 1.2% accuracy at room temperature and 2.2% overall accuracy over temperature, line and load regul ations. the dropout voltage of the adp3309 is only 120 mv (typical) at 100 ma. this device also includes a current limit and a shutdown feature. in shutdown mode, the ground current is reduced to ~1 a. the adp3309 operates with a wide input voltage range from 2.8 v to 12 v and delivers a load current in excess of 100 ma. the adp3309 anycap ldo offers a wide range of output voltages. for a 50 ma version, refer to the adp3308 data sheet. v out = 3.3v v in + adp3309-3.3 out err/ nc on off sd gnd in c2 0.47 f c1 0.47 f + figure 1. typical application circuit anycap is a registered trademark of analog devices, inc.
C2C rev. a adp3309-xx?pecifications parameter symbol conditions min typ max unit output voltage accuracy v out v in = v outnom + 0.3 v to 12 v i l = 0.1 ma to 100 ma t a = 25 c C1.2 +1.2 % v in = v outnom + 0.3 v to 12 v i l = 0.1 ma to 100 ma C2.2 +2.2 % line regulation v in = v outnom + 0.3 v to 12 v t a = 25 c 0.02 mv/v load regulation i l = 0.1 ma to 100 ma t a = 25 c 0.06 mv/ma ground current i gnd i l = 100 ma 0.8 2.0 ma i l = 0.1 ma 0.19 0.3 ma ground current in dropout i gnd v in = 2.4 v i l = 0.1 ma 0.9 1.7 ma dropout voltage v drop v out = 98% of v outnom i l = 100 ma 0.12 0.25 v i l = 10 ma 0.025 0.07 v i l = 1 ma 0.004 0.015 v shutdown threshold v thsd on 2.0 v off 0.3 v shutdown pin input current i sdin 0 < v sd 5 v 1 a 5 < v sd 12 v @ v in = 12 v 9 a ground current in shutdown i q v sd = 0 v, v in = 12 v mode t a = 25 c 0.005 1 a v sd = 0 v, v in = 12 v t a = 85 c 0.01 3 a output current in shutdown i osd t a = 25 c @ v in = 12 v 2 a mode t a = 85 c @ v in = 12 v 4 a error pin output leakage i el v eo = 5 v 13 a error pin output low voltage v eol i sink = 400 a 0.12 0.3 v peak load current i ldpk v in = v outnom + 1 v, t a = 25 c 150 ma output noise @ 5 v output v noise f = 10 hzC100 khz 100 v rms notes 1 ambient temperature of 85 c corresponds to a junction temperature of 125 c under typical full load test conditions. specifications subject to change without notice. (@t a = ?0 c to +85 c, v in = 7 v, c in = 0.47 f, c out = 0.47 f, unless otherwise noted.) 1 the following specifications apply to all voltage options. ? v o ? v in ? v o ? i l
adp3309 C3C rev. a absolute maximum ratings * input supply voltage . . . . . . . . . . . . . . . . . . . C0.3 v to +16 v shutdown input voltage . . . . . . . . . . . . . . . . C0.3 v to +16 v power dissipation . . . . . . . . . . . . . . . . . . . . internally limited operating ambient temperature range . . . C55 c to +125 c operating junction temperature range . . . C55 c to +125 c ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 c/w jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 c/w storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 10 sec) . . . . . . . . . 300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c * this is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. ordering guide voltage package marking model output option * code adp3309art-2.5 2.5 v sot-23 lde adp3309art-2.7 2.7 v sot-23 dnc adp3309art-2.85 2.85 v sot-23 dvc adp3309art-2.9 2.9 v sot-23 dwc adp3309art-3 3.0 v sot-23 dpc adp3309art-3.3 3.3 v sot-23 drc adp3309art-3.6 3.6 v sot-23 dsc * sot = surface mount. contact the factory for the availability of other output voltage options. other member of anycap family 1 model output current package option 2 adp3308 50 ma sot-23-5 lead notes 1 see individual data sheet for detailed ordering information. 2 sot = surface mount. pin function descriptions pin name function 1 in regulator input. 2 gnd ground pin. 3 sd active low shutdown pin. connect to ground to disable the regulator output. when shutdown is not used, this pin should be connected to the input pin. 4 err /nc open collector. output that goes low to indicate the output is about to go out of regulation. this pin can be left open. (nc = no connect). 5 out output of the regulator, fixed 2.5, 2.7, 2.85, 2.9, 3.0, 3.3 or 3.6 volts output voltage. bypass to ground with a 0.47 f or larger capacitor. pin configuration gnd top view (not to scale) sd out adp3309 in err/ nc nc = no connect caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adp3309 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
adp3309 C4C rev. a typical performance characteristics input voltage volts output voltage volts 3.302 3.298 3.295 3.3 4 14 5 6 7 8 9 10 11 12 13 3.301 3.300 3.297 3.296 3.299 v out = 3.3v i l = 0ma i l = 10ma i l = 100ma i l = 50ma tpc 1. line regulation: output voltage vs. supply voltage output load ma ground current a 900 750 150 025 100 50 75 600 450 300 i l = 0 to 100ma tpc 4. quiescent current vs. load current output load ma input-output voltage mv 120 96 0 025 100 50 75 72 48 24 tpc 7. dropout voltage vs. output current output load ma output voltage volts 3.302 3.295 0 10 100 20 30 40 50 60 70 80 90 3.301 3.300 3.299 3.298 3.297 3.296 v out = 3.3v v in = 7v tpc 2. output voltage vs. load current 0.2 0.4 45 25 135 5 15 35 75 95 115 55 0.1 0.0 0.1 0.2 0.3 i l = 50ma i l = 100ma temperature c output voltage % i l = 0ma tpc 5. output voltage variation % vs. temperature 5 4 0 01 0 234321 3 2 1 v out = 3.3v r l = 33 input/output voltage volts input voltage volts tpc 8. power-up/power-down input voltage volts ground current a 1150 900 0 0 1.2 12.0 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8 650 400 160 v out = 3.3v i l = 0ma tpc 3. quiescent current vs. supply vo ltage temperature c ground current a 1250 1000 0 25 5 135 15 35 55 75 95 115 750 500 250 i l = 0ma v in = 7v i l = 100ma tpc 6. quiescent current vs. temperature time s input/output voltage volts 8.0 5.0 0 0 20 200 40 60 80 100 120 140 160 180 7.0 6.0 3.0 1.0 4.0 2.0 v sd = v in c l = 0.47 f r l = 33 v out = 3.3v v in v out tpc 9. power-up overshoot
adp3309 C5C rev. a volts 3.320 3.290 0 40 400 80 120 160 200 240 280 320 360 3.310 3.300 7.0 3.280 7.5 v out = 3.3v r l = 33 c l = 0.47 f v in time s tpc 10. line transient response 3.320 3.310 0 100 500 200 300 400 3.290 3.280 100 10 3.300 volts ma time s v out = 3.3v c l = 4.7 f i out tpc 13. load transient volts 4 3 010 50 20 30 40 1 0 3 0 2 time s v sd v out = 3.3v r l = 33 c l = 0.47 f 3.3v tpc 16. turn off time s volts 3.320 3.290 0 20 200 40 60 80 100 120 140 160 180 3.310 3.300 7.0 3.280 7.5 v out = 3.3v r l = 3.3k c l = 0.47 f v in tpc 11. line transient response v out = 3.3v ma 300 200 01 5 234 0 4 2 0 100 volts v out i out time sec 0.5 4.5 1.5 2.5 3.5 tpc 14. short circuit current frequency hz ripple rejection db 10 100 10m 1k 10k 1m 0 10 100 20 30 40 50 60 70 100k a. 0.47 f, r l = 33k b. 0.47 f, r l = 33 c. 10 f, r l = 33k d. 10 f, r l = 33 v out = 3.3v d c b a 80 90 d b c a tpc 17. power supply ripple rejection 3.320 3.310 0 100 500 200 300 400 3.290 3.280 100 10 3.300 volts ma time s v out = 3.3v c l = 0.47 f i out #*$"& + #
volts 4 3 0 0 20 100 40 60 80 2 1 0 3 v sd c l = 0.47 f v out 3.3v c l = 4.7 f v out = 3.3v r l = 33 3v time s tpc 15. turn on 10 1 0.01 100 1k 100k 10k 0.1 frequency hz voltage noise spectral density v hz v out = 3.3v, c l = 0.47 f i l = 1ma tpc 18. output noise density
adp3309 C6C rev. a theory of operation the adp3309 anycap ldo uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2, which is varied to provide the available output voltage option. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. g m ptat v os noninverting wideband driver input q1 adp3309 compensation capacitor attenuation (v bandgap /v out ) r1 d1 r2 output ptat current r load c load (a) gnd r4 r3 figure 2. functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input offset volt- age that is repeatable and very well controlled. the tem- perature proportional offset voltage is combined with the compleme ntary diode voltage to form a virtual bandgap volt- age, implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. the r1, r2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. although the r1, r2 res istor divider is loaded by the diode d1, and a second divider consist- ing of r3 and r4, the values can be chosen to produce a tem- perature stable output. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor, q1. the use of this special noninverting d river enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and esr of the load capacitance. most ldos place very strict requirements on the range of esr values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resis- tance. moreover, the esr value, required to keep conventional ldos stable, changes depending on load and temperature. these esr limitations make designing with ldos more diffi cult because of their unclear specifications and extreme variations over temperature. this is no longer true with the adp3309 anycap ldo. it can be used with virtually any capacitor, with no constraint on the minimum esr. this innovative design allows the circuit to be stable with just a small 0.47 f capacitor on the output. addi- tional advantages of the design scheme include superior line noise rejection and very high regulator gain which leads to excellent line and load regulation. an impressive 2.2% accuracy is guar- anteed over line, load and temperature. additional features of the circuit include current limit and ther- mal shutdown. compared to the standard solutions that give warning after the output has lost regulation, the adp3309 provides improved system performance by enabling the err pin to give warning before the device loses regulation. as the chips temperature rises above 165 c, the circuit a cti- vates a soft thermal shutdown, indicated by a signal low on the err pin, to reduce the current to a safe level. application information capacitor selection: anycap output capacitors: as with any micropower device, output transient response is a function of the output capacitance. the adp3309 is stable with a wide range of capacitor values, types and esr (anycap). a capacitor as low as 0.47 f is all that is needed for stability. however, larger capacitors can be used if high output current surges are anticipated. the adp3309 is stable with extremely low esr capacitors (esr 0), such as multilayer ceramic capacitors (mlcc) or oscon. input bypass capacitor: an input bypass capacitor is not required. however, for applications where the input source is high impedance or far from the input pin, a bypass capacitor is recommended. connecting a 0.47 f capacitor from the input pin (pin 1) to ground reduces the circuits sensitivity to pc board layout. if a bigger output capacitor is used, the input capacitor must be 1 f minimum. thermal overload protection the adp3309 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165 c. under extreme conditions (i.e., high ambient temperature and power dissipation) where die temperature starts to rise above 165 c, the output current is reduced until the die temperature has dropped to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125 c. calculating junction temperature device power dissipation is calculated as follows: p d = ( v in C v out ) i load + ( v in ) i gnd where i load and i gnd are load current and ground current, v in and v out are input and output voltages respectively. assuming i load = 100 ma, i gnd = 2 ma, v in = 5.0 v and v out = 3.3 v, device power dissipation is: p d = (5.0 C 3.3) 100 ma + 5.0 2 ma = 180 mw ? t = t j C t a = p d j a = 0.18 190 = 34.2 c with a maximum junction temperature of 125 c, this yields a maximum ambient temperature of ~90 c.
adp3309 C7C rev. a printed circuit board layout consideration surface mount components rely on the conductive traces or pads to transfer heat away from the device. appropriate pc board layout techniques should be used to remove heat from the immediate vicinity of the package. the following general guidelines will be helpful when designing a board layout: 1. pc board traces with larger cross section areas will remove more heat. for optimum results, use pc boards with thicker copper and or wider traces. 2. increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. do not use solder mask or silk screen on the heat dissipating traces because it will increase the junction to ambient thermal resistance of the package. shutdown mode applying a ttl high signal to the shutdown pin or tying it to the input pin will turn the output on. pulling the shutdown pin down to a ttl low signal or tying it to ground will turn the output off. in shutdown mode, quiescent current is reduced to less than 1 a. error flag dropout detector the adp3309 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. if the output is about to lose regulation, for example, by reducing the supply voltage below the combined regulated output and drop- out voltages, the err pin will be activated. the err output is an open collector that will be driven low. once set, the err or flags hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. application circuits crossover switch the circuit in figure 3 shows that two adp3309s can be used to form a mixed supply voltage system. the output switches between two different levels selected by an external digital input. output voltages can be any combination of voltages from the ordering guide of the data sheet. v out = 2.7v/3.3v v in = 4v to 12v output select 4v 0v adp3309-2.7 out in sd gnd adp3309-3.3 + + in out c1 1.0 f c2 0.47 f sd gnd figure 3. crossover switch higher output current the adp3309 can source up to 100 ma without any heatsink or pass transistor. if higher current is needed, an appropriate pass transistor can be used, as in figure 4, to increase the out- put current to 1 a. adp3309-3.3 out in sd gnd + v in = 4v to 8v mje253* v out = 3.3v@1a c1 47 f c2 10 f *aavid531002 heatsink is used err r1 50 figure 4. higher output current linear regulator constant dropout post regulator the circuit in figure 5 provides high precision with low dropout for any regulated output voltage. it significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the ldo to 30 mw. the adp3000 used in this circuit is a switching regulator in the step-up configuration. + v in = 2.5v to 3.5v c1 100 f 10v l1 6.8 h d1 1n5817 c2 100 f 10v i lim v in sw1 sw2 gnd fb adp3000-adj r1 120 r2 30.1k 1% q1 2n3906 adp3309-3.3 in out gnd sd r3 124k 1% r4 274k q2 2n3906 c3 2.2 f 3.3v@100ma figure 5. constant dropout post regulator
adp3309 C8C rev. a outline dimensions dimensions shown in inches and (mm). c00141C.5C12/00 (rev. a) printed in u.s.a. 5-lead surface mount package (sot-23) 0.1181 (3.00) 0.1102 (2.80) pin 1 0.0669 (1.70) 0.0590 (1.50) 0.1181 (3.00) 0.1024 (2.60) 1 3 4 5 0.0748 (1.90) bsc 0.0374 (0.95) bsc 2 0.0079 (0.20) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) 10 0 0.0197 (0.50) 0.0138 (0.35) 0.0059 (0.15) 0.0019 (0.05) 0.0512 (1.30) 0.0354 (0.90) seating plane 0.0571 (1.45) 0.0374 (0.95)
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